Open-circuit and short-circuit defects in electrical conductors within integrated circuits (ICs) can result in major IC yield and reliability problems. A capability for localizing and identifying these types of defects is important for analyzing ICs to determine failure mechanisms therein, for qualifying ICs as known-good devices, and for implementing corrective action during IC fabrication to minimize the occurrence of such defects. Efficient and reliable detection for open-circuit and short-circuit defects will become of increasing importance as the number of interconnection levels and the length of interconnections increase with the development of new generations of ICs.
Present ICs generally employ multiple levels of patterned metallization that can obscure lower electrical conductor levels, thereby complicating failure analysis or qualification testing from a device side of the IC whereon the levels of patterned metallization are formed. Additionally, flip-chip packaging makes device-side analysis difficult if not impossible. As a result, there is a need for the development of analysis methods that can operate on both a device-side and a substrate-side of the ICs to be tested, thereby facilitating the detection of any open-circuit and short-circuit defects in the ICs.
Unfortunately, presently available substrate-side analysis methods are not totally effective in localizing open and shorted conductors. Furthermore, the presently available methods can be time consuming; they can yield a great deal of superfluous information; and they can provide only indirect evidence of open-circuit and short-circuit defects. What is needed is a rapid, sensitive method for analyzing ICs for open-circuit and short-circuit defects that operates under any IC mounting configuration.
An advantage of the apparatus and method of the present invention is that a high sensitivity for analyzing an IC for any open-circuit and short-circuit defects therein can be realized by biasing the IC with a constant-current source and measuring a change in a variable voltage of the source in response to a change in power demand by the IC produced upon irradiating a particular defect with a focused and scanned laser beam.
Another advantage of the apparatus and method of the present invention is that any open-circuit or short-circuit defects can be located within an IC from either a device side or a substrate side of the IC.
A further advantage of the apparatus and method of the present invention is that the change in voltage of the constant-current source produced by irradiation of an open-circuit or short-circuit defect within the IC by a focused and scanned laser beam can be orders of magnitude larger than any localized change in current, voltage or resistance within the IC at the location of the defect.
Still another advantage of the present invention is that an entire IC die can be examined in a single image to locate any open-circuit or short-circuit defects therein.
Yet another advantage of the present invention is that it is nondestructive and can be used for qualification testing of ICs to locate any open-circuit or short-circuit defects therein.
These and other advantages of the method of the present invention will become evident to those skilled in the art.